Publications

Book Chapters:

  • Fareena Saqib, Jim Plusquellic, Book Chapter-X Hardware Trojans Detection Schemes using Path Delays and Side Channel Analysis”, pp. 221-271 in Farimah Farahmandi, Yuanwen Huang, and Prabhat Mishra (Eds), System-on-Chip Security Validation and Verification, Springer International Publishing 2019.
  • Jim Plusquellic, Fareena Saqib, Book Chapter-X “Detecting Hardware Trojans using Delay Analysis”, pp. 219-267 in Swarup Bhunia and Mark M. Tehranipoor (Eds), The Hardware Trojan War: Attacks, Myths, and Defenses, Springer International Publishing 2018, 389 pp.
  • Fareena Saqib, Jim Plusquellic, Book Chapter-2 “VLSI Test and Hardware Security Background for Hardware Obfuscation” pp. 33-68 in D. Forte, S. Bhunia, M. Tehranipoor (Eds), Hardware Protection through Obfuscation, Springer International Publishing 2017, 347 pp.

Selected Conferences / Journals:

  • Yutian Gui, Suyash Mohan Tamore, Ali Shuja Siddiqui, Fareena Saqib. “Key Update Countermeasure for Correlation-Based Side-Channel Attacks,” Journal of Hardware and Systems (HASS), 2020
  • Bow, N. Bete, F. Saqib, W. Che, C. Patel, R. Robucci, C. Chan, J. Plusquellic, “Side-Channel Power Resistance for Encryption Algorithms using Implementation Diversity”, MDPI Journal of Cryptography, 2020.
  • Ali Shuja Siddiqui, Sam Joseph, Yutian Gui, David Lawrence, Dwayne Bradley and Fareena Saqib  ,”Establishing Chain of Trust and Distributed PKI in OpenFMB,” IEEE SouthEastCon 2020
  • Ali Shujah Siddiqi, Geraldine Shirley Nicholas, Sam Reji Joseph, Yutian Gui, Jim Plusquellic, Martin Van Dijk, Fareena Saqib, “Multilayer Camouflaged Secure Boot for SoCs”, 20th International Workshop on Microprocessors and SoC Test, Security and Verification (MTV), 2019, 56-61.
  • Gui, S.M. Tamore, A.S. Siddiqui, F. Saqib, “A key update scheme for side-channel attack mitigation”, 2019 IEEE 16th International Conference on Smart Cities: Improving Quality of Life using ICT, IoT and AI, UNC Charlotte, October 2019.
  • Shirley, F. Saqib, “Information flow tracking in RISC-V”, 2019 IEEE 16th International Conference on Smart Cities: Improving Quality of Life using ICT, IoT and AI, UNC Charlotte, October 2019.
  • S. Siddiqui, Y. Gui, F. Saqib, “Boot time bitstream authentication for FPGAs”, 2019 IEEE 16th International Conference on Smart Cities: Improving Quality of Life using ICT, IoT and AI, UNC Charlotte, October 2019.
  • Don Owen Jr., Derek Heeger, Calvin Chan, Wenjie Che, Fareena Saqib, Matthew Areno, Jim Plusquellic, “An Autonomous, Self-Authenticating, and Self-Contained Secure Boot Process for Field-Programmable Gate Arrays”, MDPI Journal of Cryptography, 2(3):15, 2018.
  • Yutian Gui, Suyash Mohan Tamore, Ali Shuja Siddiqui, Fareena Saqib. “Security Vulnerabilities of Smart Meters in Smart Grid and Countermeasures,” IEEE 45th Annual Conference of the Industrial Electronics Society (IECON), 2019.
  • Yutian Gui, Suyash Mohan Tamore, Ali Shuja Siddiqui, Fareena Saqib. “Key Update Countermeasure for Correlation-Based Side-Channel Attacks,” International Conference on Physical Assurance and Inspection of Electronics (PAINE), Washington, DC, USA, 2019.
  • Ali Shuja Siddiqui, Geraldine Shirley, Girija Bhagwat, Shreya Bendre, Jim Plusquellic, Fareena Saqib “Secure Design Flow of FPGA based RISC-V Implementation”, International Verification and Security Workshop IVSW , July 2019
  • Bryson Shannon, Spandana Etikala, Yutian Gui, Ali Shuja Siddiqui, Fareena Saqib, “Blockchain based Distributed Key Provisioning and Secure Communication over CAN FD”, IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Miami, FL, USA, July 2019.
  • Ali Shuja Siddiqui, Prithwirai Roy Chowdhury, Yutian Gui, Madhav Manjrekar, Somasundaram Essakiappan Fareena Saqib, “Design of Secure Reconfigurable Power Converters,” IEEE Workshop on Cybersecurity of Power Electronics Systems (IEEE CyberPELS), Knoxville, TN, USA, April 2019.
  • Yutian Gui, Ali Shuja Siddiqui, Suyash Mohan Tamore and Fareena Saqib, “Investigation of Vulnerabilities on Smart Grid End Devices,” IEEE Workshop on Cybersecurity of Power Electronics Systems (IEEE CyberPELS), Knoxville, TN, April 2019.
  • Wenjie Che, Fareena Saqib, Jim Plusquellic, “Novel Offset Techniques for Improving Bitstring Quality of a Hardware-Embedded Delay PUF”, IEEE Transactions on Very Large-Scale Integration (VLSI) Systems, 26(4):733-743, (2018).
  • Wenjie Che, M. Martin, G. Pocklassery, V.K. Kajuluri, Fareena Saqib, Jim Plusquellic, “A Privacy-Preserving, Mutual PUF-Based Authentication Protocol”, Cryptography, 2017, 1 (1) 3, 17 pp.
  • A.S. Siddiqui, Y. Gui, J. Plusquellic, F. Saqib, “A secure communication framework for ECUs”, Advances in Science, Technology and Engineering Systems Journal (ASTESJ) Special issue on Recent Advances in Engineering Systems, 2017, 2(3): 1307-1313.
  • Saqib, D. Ismari, C. Lamech, J. Plusquellic, “Within-die delay variation measurement and power transient analysis using REBEL”, Trans. on VLSI Systems, Vol. 23, No. 4, Apr. 2015, pp. 776-780.
  • Saqib, A. Dutta, J. Plusquellic, P. Ortiz, M. S. Pattichis, “Pipelined decision tree classification accelerator implementation in FPGA (DT-CAIF)”, IEEE Trans. on Computers, Volume 64, No. 1, Jan. 2015, pp 280-285.
  • Saqib, M. Areno, J. Aarestad, J. Plusquellic, “An ASIC implementation of a hardware-embedded physical unclonable function”, IET Computers and Digital Techniques, Vol 8, Issue 6, Nov. 2014, pp 288-299.
  • Wenjie Che, Manel Martinez-Ramon, Goutham Pocklassery, Fareena Saqib, Jim Plusquellic, “Delay Model and Machine Learning Exploration of a Hardware-Embedded Delay PUF”, IEEE Hardware-Oriented Security and Trust (HOST 2018), 153-158, 2018.
  • Goutham Pocklassery, Wenjie Che, Fareena Saqib, Matthew Areno, Jim Plusquellic, “Self-Authenticating Secure Boot for FPGAs”, IEEE Hardware-Oriented Security and Trust (HOST 2018), 221-226, 2018.
  • S. Siddiqui, Y. Gui, F. Saqib, “Hardware Based Root of Trust for Electronic Control Units”, IEEE SouthEastCon 2018, St. Petersburg, FL. USA, pp 1-7, 19-22 April 2018.
  • Ali Shuja Siddiqui, Yutian Gui, David Lawrence, Stuart Laval, Jim Plusquellic, Madhav Manjrekar, Badrul Chowdhury, Fareena Saqib, “Hardware Assisted Security Architecture for Smart Grid,” 44th Annual Conference of the IEEE Industrial Electronics Society (IECON 2018), Washington, DC, pp. 2890-2895, 2018.
  • A.S. Siddiqui, Y. Gui, J. Plusquellic, F. Saqib, “Secure communication over CANBus”, IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS) , Boston, MA, USA, 6-9 August 2017.
  • A.S. Siddiqui, C-C. Lee, F. Saqib, “Hardware based Protection against Malwares by PUF based Access Control Mechanism”, IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS), Boston, MA, USA, 6-9 August 2017.
  • A.S. Siddiqui, C-C. Lee, W. Che, J. Plusquellic, F. Saqib, “Secure Intra-Vehicular Communication over CANFD”, Asian Hardware Oriented Security and Trust (AsianHOST, 2017), Beijing, China, 19-20 Oct. 2017.
  • Pocklassery, V. K Kajuruli, F. Saqib, J. Plusquellic, “Physical Unclonable Functions and Dynamic Partial Reconfiguration for Security in Resource-Constrained Embedded Systems”, IEEE International Symposium on Hardware-Oriented Security and Trust (HOST 2017), McLean, VA, USA, 1-5 May 2017.
  • Che, F. Saqib, J. Plusquellic, “A Novel Offset Method for Improving Bitstring Quality of a Hardware-Embedded Delay PUF”, IEEE International Symposium on Hardware Oriented Security and Trust (HOST 2017), McLean, VA, USA, 1-5 May 2017.
  • S. Siddiqui, Y. Gui, J. Plusquellic, F. Saqib, “Hardware based Security Enhanced Framework for Automotive”, IEEE Vehicular Networking Conference (VNC), Columbus, OH, USA, 8-10 December 2016.
  • Ismari, J. Plusquellic, C. Lamech, S. Bhunia, F. Saqib, “On Detecting Delay Anomalies introduced by Hardware Trojans”, Proceedings of the 35th International Conference on Computer-Aided Design (ICCAD 2016), Austin, TX, USA, 7 pp., 7-10 November 2016.
  • Arrasmith, B. Webster, F. Saqib, “Software Dominant Unconventional Optical Imaging through Atmospheric Turbulence with Advances towards Real-Time, Diffraction-Limited Performance”, In-Tech 2016 International Conference on Innovative Technologies held in Prague, Czech Republic during 6-8 September 2016.
  • Che, F. Saqib, J. Plusquellic, “PUF-based Authentication”, Invited Paper, Proceedings of the IEEE/ACM International Conference on Computer-Aided Design (ICCAD 2015), Austin, TX, USA, pp. 337-344, 2-6 November 2015.
  • Konstantinou, M. Maniatakos, F. Saqib, S. Hu, J. Plusquellic, Y. Jin, “Cyber-Physical Systems: A Security Perspective”, European Test Symposium (ETS ‘2015), Cluj-Napoca, Romania, pp. 1-8, 25-29 May 2015.
  • Wilcox, F. Saqib, J. Plusquellic, “GDS-II Trojan Detection using Multiple Supply Pad VDD and GND IDDQs in ASIC Functional Units”, IEEE International Symposium on Hardware-Oriented Security and Trust (HOST 2015), Washington DC, USA, pp. 144-150, 5-7 May 2015.
  • Saqib, J. Plusquellic “An ASIC Implementation of Hardware based PUFs using Path Delays as Source of Entropy” SaTC Principal Investigators’ Meeting organized by U.S. National Science Foundation (NSF) under its Secure and Trustworthy Cyberspace (SaTC) Program held in Arlington VA, USA at the Hyatt Regency Crystal City, January 5-7, 2015.
  • Saqib, J. Plusquellic, “Design for Manufacturability for Yield Improvement by using Embedded Test Structures”, 7thAnnual Nanoscience Technology Symposium (NanoFlorida 2014), Miami, Florida, USA, 24-26 September 2014.
  • Saqib, J. Plusquellic, “HELP PUF Prototyping on Spartan 3 FPGAs”, CyberSeed-Hardware Challenge/Competition Conference, organized by Comcast Center of Excellence for Security Innovation (CSI), held at University of Connecticut, USA, 20-22 October 2014.
  • Saqib, C. Lamech, J. Plusquellic, “Small-Delay Defects Detection using at-Speed Clocks and Embedded Test Structure”, International Workshop on Computer Science and Engineering (WCSE), Dubai, UAE, 22-23 August 2014.