I am NOT active in Analog, Mixed Signal Design anymore, and am not advising new students. Please contact Dr. Jeremy Holleman if you are interested in working in this area.
Ultra low power integrated analog-mixed signal circuits and systems
The research focuses on circuit and system level techniques to minimize power dissipation in low-speed, moderate resolution data converters. Such converters find use is applications such as implantable biomedical devices, deep space probes and wireless sensor networks. Techniques researched include optimal biasing of amplifiers using an inversion coefficient design methodology, use of digital calibration to simplify analog power performance requirements, digitally assisted slew rate control and low voltage switched-capacitor circuits.
Algorithmic ADC, 10-bit 500 Ksps (Steven Tucker) Micropower OTA (Chris Wichman)
Transresistance PGA(Srikanth Mohan)
I am not advising new students in Analog Mixed Signal Design. Please contact Dr. David Binkely or Dr. Thomas Weldon if you are interested in working in this area.
Dr. Steven D. Tucker (PhD co-advisor, currently at Intel Crop.): Steve’s research focuses on power optimization techniques in algorithmic ADCs. Digital calibration shifts circuit complexity (and hence power dissipation) from the analog to the digital domain where a low voltage operation reduces overall power dissipation. A digitally predicted slew rate enhancement is shown to reduce the OTA bias current requirements. Further, the OTA is designed using an inversion coefficient based design methodology to optimally bias the transistors thus ensuring minimum power dissipation. The proposed techniques are experimentally demonstrated through the silicon implementation of 10-bit, 500 Ksps, 0.5 μm CMOS ADC operating off a 3V supply.
Christopher Wichman (MS Thesis advisor, currently at Analog Devices, Inc.): Chris’ research demonstrate techniques that enable low voltage realization of algorithmic ADC. A modified switched OTA amplifier enables the common-mode input to the OTA to be held at the supply rails. Moreover, the switched OTA topology eliminates the input switch. Clock boosting is used to operate the input sample and hold switches at low supply voltages. An inversion coefficient design methodology enables transistor design across strong, moderate and weak inversion region ensuring optimum biasing of transistors. The proposed techniques are verified through the design of a 10-bit, 50 Ksps algorithmic ADC. The ADC is realized in 0.5 μm CMOS technology and dissipates 600 μW operating of a 1.5V supply.
Srikanth Mohan (MS Thesis advisor, currently at Maxim Integrated Products, Inc.): Srikanth’s research focuses on the design of fully differential operational transresistance amplifiers. The utility of these amplifiers is shown in the design of a 10 MHz programmable gain amplifier controlled by a 6-bit DAC implemented in 0.5 um CMOS.
Robert Crawford (MS Thesis Advisor, Currently at Time Warner): Robert’s research explores techniques to characterize and reduce leakage related errors switched capacitor circuits. Initial efforts were focused on experimentally verifying leakage characteristics under different biasing conditions in a 180nm CMOS process. EKV models of the MOS devices were modified to incorporate the experimental data. At the circuit level two approaches are being explored to reduce leakage related errors. – 1) Active leakage compensation using additional circuitry. 2) Modification of existing switched capacitor circuits to for leakage insensitivity.
Vamsikrishna Parupalli (MS Thesis Advisor, Currently at Cirrus Logic ) Vamsi’s research focuses on the design of leakage insensitive low voltage Nyquist rate analog-to-digital converter architecture for biomedical applications.
Dr. David Binkley of Electrical and Computer Engineering at UNC-Charlotte.