Department of Electrical and Computer Engineering
The University of North Carolina at Charlotte
9201 University City Blvd.
Charlotte, NC 28223
Email: firstname.lastname@example.org Office: EPIC 2260
Analog, mixed-signal, and RF integrated circuit design and test in CMOS processes, including optimization methodologies for analog CMOS design. Applications include biomedical neural implants, positron emission tomography (PET) medical imaging, and micropower battery-operated consumer products.
Modeling and analog, mixed-signal design in emerging organic and ZnO thin-film, FET technologies. Potential applications include large-area, low-cost electronic systems and hybrid systems configured with sensors and devices in the emerging technologies or CMOS technologies.
Tradeoffs and Optimization in Analog CMOS Design
All day tutorial for the Microsystems Strategic Alliance of Quebec (members include the University of Quebec at Montreal, Mc Gill University, Ecole Polytechnique Montreal, Concordia University, and other universities) and the IEEE Solid-State Circuits Society, Montreal, Montreal, Canada, January 30, 2009.
Tutorial at the MOS AK workshop, 2008 European Solid-State Device Research Conference (ESSDERC)/European Solid-State Circuits Conference (ESSCIRC), Edinburgh, Scotland, September 19, 2008.
Tutorial at 2008 International Symposium of Circuits and Systems (ISCAS), Seattle, Washington, May 2008.
Tutorial, “From Transistor to PLL — Analog Design and EDA Methods,” with Helmut Graeb, Georges Gielen, and Jaijeet Roychowdhury, at 2008 Design and Test in Europe (DATE), Munich, Germany, March 2008.
Plenary talk at 14th International Conference Mixed Design of Integrated Circuits and Systems (MIXDES), Ciechocinek, Poland, June 2007.
Invited talk, Polytechnical Institute of Lausanne (EPFL), West Switzerland Chapter of the IEEE Solid-State Circuits Society, Lausanne, Switzerland, July 2007.
Invited talk, The Technical University of Munich, Institute for Electronic Design Automation, Munich, Germany, June 2007.
Tradeoffs and Optimization in Analog CMOS Design, John Wiley and Sons Ltd., ISBN 978-0-470-03136-0, June 2008.